/****************************************************************************************************/
/**
\file       Mcu_Cfg.h
\brief      Mcu driver configuration types
\author     Equipo 1
\version    1.0
\date       09/02/2014
*/
/****************************************************************************************************/

#ifndef MCU_CFG_H        /*prevent duplicated includes*/ 
#define MCU_CFG_H  


/* Variable types and common definitions */
#include  "typedefs.h"
/* S12X derivative information */
#include  "mc9s12xep100.h"
  

#define CNF_XTAL_FREQ_MHZ       4
#define CNF_BUS_CLOCK_FREQ_MHZ  48       


/** ~~~~~~~~~~~~ System configuration definitions ~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/
     
/** Select POSTDIV value to obtain the lowest possible FVCO/F_REF ratio and stable VCO value */
#if (CNF_BUS_CLOCK_FREQ_MHZ*4 > 120)
    #define CNF_POSTDIV_VALUE   0u
#elif ((CNF_BUS_CLOCK_FREQ_MHZ*4 >= 32) & (CNF_BUS_CLOCK_FREQ_MHZ*4 <= 120))
    #define CNF_POSTDIV_VALUE   1u
#elif (CNF_BUS_CLOCK_FREQ_MHZ*4 <= 32)
    #define CNF_POSTDIV_VALUE   (64/(CNF_BUS_CLOCK_FREQ_MHZ*4))
#endif    


/** Select REFDV factor to obtain the highest possible REFCLK frequency F_REF */
#define CNF_REFDV_FACTOR        (CNF_XTAL_FREQ_MHZ/4)

/* Define REFDV_VALUE */
#define CNF_REFDV_VALUE         (CNF_REFDV_FACTOR-1)

/** Define desired VCO frequency value */
#if (CNF_POSTDIV_VALUE == 0)
    #define CNF_VCO_FREQ        (CNF_BUS_CLOCK_FREQ_MHZ*2)
#else
    #define CNF_VCO_FREQ        (CNF_BUS_CLOCK_FREQ_MHZ*4*CNF_POSTDIV_VALUE)
#endif    


/** Configure VCO gain for optimal stability and lock time */
/** VCOFRQ = 0; 32MHz <= fVCO <= 48MHz  */
#if ((CNF_VCO_FREQ >= 32) & (CNF_VCO_FREQ <= 48))
    #define CNF_VCOFRQ_VALUE    0u                                            
/** VCOFRQ = 1; 48MHz <  fVCO <= 80MHz  */
#elif ((CNF_VCO_FREQ > 48) & (CNF_VCO_FREQ <= 80))
    #define CNF_VCOFRQ_VALUE    1u 
/** VCOFRQ = 3; 80MHz <  fVCO <= 120MHz */    
#elif ((CNF_VCO_FREQ > 80) & (CNF_VCO_FREQ <= 120))
    #define CNF_VCOFRQ_VALUE    3u 
#else 
/** Selected VCO frequency is out of range */
    #error  "VCO Frequency is out of Range"
#endif

/* Define REFDV value based on Equation 1 */
#define CNF_SYNR_FACTOR     (CNF_REFDV_FACTOR*CNF_VCO_FREQ)/(2*CNF_XTAL_FREQ_MHZ)
/* Define SYNR value */
#define CNF_SYNR_VALUE      (CNF_SYNR_FACTOR-1)

/* Define F_REF based on Equation 4 */
#define CNF_F_REF           (CNF_XTAL_FREQ_MHZ/(CNF_REFDV_VALUE+1))

/** Configure PLL filter for optimal stability and lock time */
/** REFFRQ = 0; 1MHz <= fREF <= 2MHz */
#if ((CNF_F_REF >= 1) & (CNF_F_REF <= 2))
    #define CNF_REFFRQ_VALUE    0u  
/** REFFRQ = 1; 2MHz <  fREF <= 6MHz */
#elif ((CNF_F_REF >  2) & (CNF_F_REF <= 6))
    #define CNF_REFFRQ_VALUE    1u 
/** REFFRQ = 2; 6MHz <  fREF <= 12MHz */
#elif ((CNF_F_REF >  6) & (CNF_F_REF <= 12))
    #define CNF_REFFRQ_VALUE    2u 
/** REFFRQ = 3; fREF > 12MHz */
#elif (CNF_F_REF >  12)
    #define CNF_REFFRQ_VALUE    3u
#else
/** Selected F_REF frequency is out of range */
    #error  "F_REF Frequency is out of Range"        
#endif

/** Define actual BUS_FREQ value to be programmed in PLL circuit */
#if (CNF_POSTDIV_VALUE == 0)
    #define CNF_ACTUAL_BUS_FREQ         (u32)(2*CNF_XTAL_FREQ_MHZ*(SYNR_SYNDIV+1))*1000000 / ((REFDV_REFDIV+1)*2)
    #define CNF_ACTUAL_BUS_FREQ_KHZ     (2*CNF_XTAL_FREQ_MHZ*CNF_SYNR_FACTOR)*1000 / (CNF_REFDV_FACTOR*2)
#else
    #define CNF_ACTUAL_BUS_FREQ         (u32)(2*CNF_XTAL_FREQ_MHZ*(SYNR_SYNDIV+1))*1000000 / ((REFDV_REFDIV+1)*4*POSTDIV_POSTDIV)
    #define CNF_ACTUAL_BUS_FREQ_KHZ     (2*CNF_XTAL_FREQ_MHZ*CNF_SYNR_FACTOR)*1000 / (CNF_REFDV_FACTOR*4*CNF_POSTDIV_VALUE)
#endif

#if (CNF_ACTUAL_BUS_FREQ_KHZ != CNF_BUS_CLOCK_FREQ_MHZ*1000)
    #error "Selected BUS Frequency can NOT be calculated automatically. Manually set PLL values"
#endif


#endif /* MCU_CFG_H */ 